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Abstract

Digital Logic Gates are fundamental components of digital circuits and systems, encompassing eight types: AND, OR, NOT (INVERTER), BUFFER, NAND, NOR, XOR, and XNOR. As Artificial Intelligence (AI) continues to advance, the demand for diverse datasets grows. This study introduces the Hand-drawn Digital Logic Gates (HDL) dataset, a novel and balanced collection of images representing these gates, accompanied by tabular data generated through deep learning techniques. The analysis of this dataset employs various machine learning models, utilizing no-code tools such as Orange Data Mining and Liner.ai. Additionally, state-of-the-art models from HuggingFace are incorporated to enhance the analysis. The significance of this research lies in two key contributions: It establishes the first balanced dataset for Hand-drawn Digital Logic Gates (HDL), facilitating further research and development in this area. It pioneers the use of both shallow machine learning and deep learning models to achieve a good-performing classification of the eight Digital Logic Gates. The evaluation on the HDL dataset, comprising 1,200 images (150 images per gate across 8 digital logic gates), demonstrated a high classification accuracy of 92.5% and an F1-score of 92.5% using an EfficientNet model with data augmentation. This work lays the groundwork for future machine learning applications in logic-gate classification. Furthermore, this study inspires potential developments in areas such as object detection of circuit components and OCR-like applications that can convert hand-drawn circuits into digital formats.

Keywords

Supervised machine learning, Deep learning, Image classification, Image embedding, Digital logic gates classification

Article Type

Article

First Page

32

Last Page

39

Publication Date

6-30-2026

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